Design the values of $W$ for each of the transistors of the op amp shown assuming that the channel lengths of all transistors are $1 \mu \mathrm{~m}$. Also design the values of the bias voltages $V_{B N}$ and $V_{B P}$. The transistor model parameters are $K_N{ }^{\prime}=300 \mu \mathrm{~A} / \mathrm{V}^2, V_{T N}=0.5 \mathrm{~V}$, and $K_P{ }^{\prime}=70 \mu \mathrm{~A} / \mathrm{V}^2, V_{T P}=$ -0.5 V . Ignore the bulk effects. Use the following constraints among the transistor widths:

$$
\begin{aligned}
& W_1=W_2, W_4=W_5, W_6= \\
& 10 W_4, W_7=10 W_5, W_8=W_9, \\
& \text { and } W_{10}=W_{11}=W_{12}=W_{13}
\end{aligned}
$$


Round the values of the transistor widths to the nearest integer that meets or exceeds the specifications. Do not use safety factors or worst case in your design. The op amp specifications assuming a load capacitance of 5pF are:

$$
V_{\text {icm }}{ }^{+}=0.75 \mathrm{~V}, V_{\text {icm }}{ }^{-}=-0.25 \mathrm{~V}, G B=200 \mathrm{MHz}, V_{\text {out }}{ }^{+}=0.5 \mathrm{~V}, V_{\text {out }^{-}}=-0.5 \mathrm{~V}, S R=100 \mathrm{~V} / \mu \mathrm{s}
$$